| 摘要 |
An engine analyzer performs electrical tests on a multi-cylinder internal combustion engine under the control of the digital computer. The engine analyzer includes a hardware cylinder counter which keeps track of the current cylinder number while various engine tests are performed. The hardware cylinder counter is a programmable digital counter under the control of the computer which performs the cylinder count function independent of operation of the computer. The counter has jam inputs for receiving an input count from the computer which represents the number of cylinders of the engine under test. The counter is counted down in response to a cylinder clock signal. The counter is reset to the digital value at its jam inputs whenever its Set input is pulsed. A synchronizing circuit is responsive to a No. 1 cylinder pulse and to a carry-out pulse which is produced by the counter when the count reaches zero. The counter is reset to the input count whenever the No. 1 pulse or the carry-out pulse is present. As a result, cylinder counts are maintained at all times, even if the No. 1 pulse is lost or not available. The counter provides an output count to the computer (and to other devices under the control of the computer) for use in various engine tests including waveform displays, power check, and engine timing measurements.
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