Method for forming dense multilevel interconnection metallurgy for semiconductor devices

摘要

A method for providing high density multiple level metallurgy for integrated circuit devices in which a relatively thin layer of plasma produced silicon nitride is deposited over a first level of interconnection metallurgy formed on a layer of silicon oxide. Overlap via holes are etched in the nitride layer followed by deposition of a thicker layer of polyimide forming polymer. A second set of via holes larger than the first are provided in the polymer layer and a second layer of interconnection metallurgy is then deposited by a lift-off deposition technique.