| 摘要 |
A PLL oscillator circuit is proposed which has better static and dynamic characteristics than the known PLL oscillator circuits. In the PLL oscillator circuit, a mixing circuit (26) or a multiplication circuit (30), by means of which the first comparison frequency (fv1), which corresponds to the incremental frequency, is converted into a second higher comparison frequency (fv2), is provided between the output (21) of a frequency divider circuit (18) and a second input (22) of a phase comparison circuit (13). Due to the higher comparison frequency (fv2) and a higher reference frequency (fR2) corresponding to this higher comparison frequency, the cut-off frequency of a low-pass filter (14) belonging to the control loop of the PLL oscillator circuit is increased, which accelerates the correction and provides a possibility for modulating the reference frequency. <IMAGE>
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