发明名称 PACKAGE FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To avoid the positional displacement of a sealing cap while allowing the selection of lead width by forming a dig-in section, four edges thereof are chamfered, to the upper surface of a lead base in order to seal the ceramic IC with the package and fitting the sealing cap into the dig-in section while applying adhesive paste to the side surface of the cap. CONSTITUTION:The dig-in section 12a for fitting the sealing cap 12 is formed to the upper surface of a base lead 11 encasing a semiconductor chip 15 while chamfering four edges. According to such constitution, the cap 12 is exposed partially to the upper surface of the base by fitting the sealing cap 12 into the dig-in section 12a. Consequently, even when the width of the base 11 is expanded a mounting lead span does not exceed a standard span, adhesive paste 14 is difficult to hand down to a lead 13 and a bonding wire 16, and the generation of defective products is reduced remarkably. The base 11 and the cap 12 are positioned easily.
申请公布号 JPS58223351(A) 申请公布日期 1983.12.24
申请号 JP19820107272 申请日期 1982.06.22
申请人 FUJITSU KK 发明人 MORI HIDEJI
分类号 H01L23/02;H01L23/10 主分类号 H01L23/02
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