发明名称 DATA PROCESSOR
摘要 PURPOSE:To improve the reliability of a control data, by comparing the result of operation according to the running direction of the control data at checking period and a prescribed operating system with a predicted result on the same condition at the stage of end of check. CONSTITUTION:A value of items to be tested of a mu test instruction from a branch control circuit 1.4 of a control storage CS control section 1 is fetched to a remember register 3.7 of a CS control data CD check control section 3, where the running route of CD is determined. A check start/check end bit from a CS data register DR 1.3 is inputted to a control section 3.1, which controls the register 3.7 and a comparator 3.12. The final result of shift operation at an exclusive OR EOR 3.3 during the running of the mu instruction is compared with the value of an auxiliary CSDR 3.11 predicted on the running route at the check end with the comparator 3.12, and a dissidence signal at dissidence and an error party-checked 3.2 for the instruction from the CSDR 1.3 are reported to an operation processing section 2 via an OR circuit 3.13.
申请公布号 JPS58213345(A) 申请公布日期 1983.12.12
申请号 JP19820094828 申请日期 1982.06.04
申请人 HITACHI SEISAKUSHO KK 发明人 UKON HITOTSUGU;MURAMATSU MAKOTO
分类号 G06F11/08;G06F9/22;G06F9/26;G06F12/16 主分类号 G06F11/08
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