发明名称 Circuit arrangement for detecting line loop closure and interruption in telecommunication systems
摘要 Circuit arrangement for detecting line loop closure and interruption in telecommunication systems. The circuit uses a plurality of transformers. Through appropriate series connection of windings, interfering winding voltages of an alternating current source cancel one another and any residual voltages remain below the response threshold of an evaluating rectifier circuit. <IMAGE>
申请公布号 DE3235706(C1) 申请公布日期 1983.11.17
申请号 DE19823235706 申请日期 1982.09.27
申请人 STANDARD ELEKTRIK LORENZ AG, 7000 STUTTGART, DE 发明人 MANGA, SALIH, DIPL.-ING., 7141 SCHWIEBERDINGEN, DE
分类号 H04M7/00;(IPC1-7):H04M7/00;H04Q1/30;H04Q3/24 主分类号 H04M7/00
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