发明名称 BIAS CIRCUIT
摘要 PURPOSE:To reduce the power consumption of a load and a bias circuit itself, by interrupting the bias to the load when no load is used. CONSTITUTION:A bias voltage is applied to a load 17 via a transistor (TR)Q12 and a TRQ13 is connected between the base of the TRQ12 and ground. To the base of the TRQ13, 1, 0 signals to control the load 17 are applied. When a signal of 0 level is impressed to the base of the TRQ13, the TRQ13 is set off. Thus, the TRQ12 is set on and a bias voltage is applied from the emitter of the TRQ12 to the load 17. Further, when a high level signal is impressed to the base of the TRQ13, the TRQ13 is set on and the TRQ12 is set off. Thus, the supply of the bias voltage to the load 17 is interrupted.
申请公布号 JPS58187093(A) 申请公布日期 1983.11.01
申请号 JP19820070752 申请日期 1982.04.27
申请人 TOKYO SHIBAURA DENKI KK 发明人 GOMI HIROSHI
分类号 H04N9/64;H04B1/16 主分类号 H04N9/64
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