发明名称 STATIC RANDOM ACCESS MEMORY
摘要 PURPOSE:To reduce hardware in scale, by adding a function for reading and writing data by use of the input-output common terminal of a static RAM, and outputting data which is written and read, bit by bit, in series on bit-by-bit series output basis. CONSTITUTION:Data RD1-RD8 read out of a memory matrix 10 in parallel are held in registers 201-208 once a chip selecting signal is reset, and when a shift clock CK is supplied to the registers 201-208 while the selecting signal is held reset, the data RD are shifted by one bit every time the shift clock CK rises to obtain serial data from an input-output common information source 138. Consequently, data are read and written in series with less hardware.
申请公布号 JPS58182188(A) 申请公布日期 1983.10.25
申请号 JP19820065676 申请日期 1982.04.20
申请人 NIPPON DENKI KK 发明人 NEGISHI IWAO
分类号 G11C7/00;G06F12/04;G11C7/10 主分类号 G11C7/00
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