| 摘要 |
PURPOSE:To improve the integration and workability by forming a self-alignment with a nitrided silicon film on the surface of a gate electrode at the exposed surface of a source region, thereby eliminating the margin of etching mask matching at the time of processing the contacting hole. CONSTITUTION:A field SiO2 film 2 is grown on the substrate 1, a gate oxidized film 5 is formed, polysilicon grown by a CVD technique is patterned, a gate electrode 6 is formed, the surface is nitrided directly, thereby forming a nitrided silicon film 7. An As is implanted to the substrate 1, source region 3 and the drain region 4 are self-aligned, a phosphorus glass film 8 is adhered, and etched, thereby forming contacting holes 11, 12. Even if the contacting hole 11 is overlapped on the gate electrode 6, self-alignment is performed due to the presence of the film 7, and electric insulation between the wiring gates can be made sufficient enough. |
