发明名称 Self-aligned extended epitaxy mesfet fabrication process
摘要 A fabrication process for a gallium arsenide MESFET device is disclosed. A feature of the invention is placing a gate structure on the gallium arsenide substrate. Then a process including molecular beam epitaxy, grows epitaxial gallium arsenide on each respective side of the gate, forming a raised source region and a raised drain region. Gallium arsenide will not grow in a conductive state on top of a tungsten gate metal. The resulting MESFET device has a raised source and drain which significantly reduces the high resistance depleted surface adjacent to the gate which generally occurs in planer gallium arsenide MESFET devices. Furthermore, the MESFET channel region which is defined by the proximate edges of the source and the drain, is self-aligned with the edges of the gate by virtue of the insitu process for the formation of the source and drain, as described above.
申请公布号 US4404732(A) 申请公布日期 1983.09.20
申请号 US19810327832 申请日期 1981.12.07
申请人 IBM CORPORATION 发明人 ANDRADE, THOMAS L.
分类号 H01L29/80;H01L21/203;H01L21/205;H01L21/338;H01L29/08;H01L29/47;H01L29/812;(IPC1-7):H01L21/20;H01L21/30 主分类号 H01L29/80
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