发明名称 |
Data-extraction circuitry for PCM communication system |
摘要 |
Incoming and outgoing lines on opposite sides of a PCM coupling network, each carrying a recurrent frame with a multiplicity of 8-bit channels which are to be individually tested, have branches extending to an input-side data extractor and an output-side data extractor of substantially identical construction co-operating with a control device such as a microprocessor serving to compare the data extracted in a given time slot from an incoming line with those extracted in a corresponding time slot from an outgoing line coupled thereto. Each extractor, realized in integrated circuitry, comprises a multiplexer for selecting one of the associated lines, a register storing the identity of the line to be selected, and presettable counters stepped by a time base synchronized with the PCM system for enabling the loading of an output register by the multiplexer at the instant when a byte of the desired channel appears on the chosen line. The line-identifying register and the presettable counters are loaded with numerical data from the control device with the aid of several cascaded decoders responsive to instruction from that device.
|
申请公布号 |
US4404630(A) |
申请公布日期 |
1983.09.13 |
申请号 |
US19810235947 |
申请日期 |
1981.02.19 |
申请人 |
CSELT-CENTRO STUDI E LABORATORI TELECOMMUNICAZIONI S.P.A. |
发明人 |
BELFORTE, PIERO;BORTIGNON, RENZO |
分类号 |
H04M3/26;H04J3/14;H04Q11/04;(IPC1-7):H04Q11/04 |
主分类号 |
H04M3/26 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|