发明名称 Arrangement for converting a measurement voltage to a constant amplitude whilst retaining its frequency
摘要 The subject matter of the application is a circuit arrangement which brings a measurement voltage UM, which is within a certain frequency band, for example the telephone transmission band, and arrives attenuated in dependence on frequency, to a constant amplitude whilst retaining its frequency. In a limiter circuit (1), the measurement voltage UM is first converted into a square wave voltage. A tracking filter of familiar construction, which here consists of a switched-capacitor low-pass filter (7) and a PLL (phase-locked loop) circuit (2) with a step-down stage (3) in the control loop, is controlled in its cut-off frequency in such a manner that the latter is in each case 1.28 times the measurement voltage frequency. The constant square wave voltage at the output of the step-down circuit (3), the frequency of which corresponds to the frequency of the measurement voltage for each control operation, is reshaped into the desired sinusoidal voltage by the switched-capacitor low-pass filter (7). Interfering components of the clock signal frequency controlling the low-pass filter (7) are suppressed by two low-pass filters (6 and 8). A further development contains a frequency discriminator (4) which is tuned to the range limits of the frequency band to be processed and the output signal of which is combined with the signal from the PLL circuit (2) in an AND circuit (5) so that this PLL circuit only becomes effective in the predetermined band. <IMAGE>
申请公布号 DE3205683(A1) 申请公布日期 1983.09.01
申请号 DE19823205683 申请日期 1982.02.17
申请人 VIERLING,OSKAR,PROF.DR.PHIL.HABIL. 发明人 PEUSER,WOLFGANG,DIPL.-PHYS.DR.
分类号 G01R19/00;(IPC1-7):G01R19/00 主分类号 G01R19/00
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