发明名称 MEMORY ACCESS DEVICE
摘要 PURPOSE:To increase the number of access words per a unit time with the conventional constitution of a memory matrix, by making it unnecessary to consider a precharge time for a strobe timing signal in case of memory access. CONSTITUTION:When block select signals BLOCK SELECTs of two subordinate bits A7 and A8 in the address assignment shown in figure are logical 0 together, a block BLOCK0 of a memory matrix 1 is selected by a block select decoder 3, and a low address strobe signal is supplied from a strobe generating circuit 4 to a memory element group 2 of the corresponding block on a basis of a strobe timing signal RAS TIMING. Thus, the first memory cycle is started. When the read or write operation in the first memory cycle is terminated, a block BLOCK1 of the memory matrix 1 is selected, and the second memory cycle is started similarly to the first memory cycle.
申请公布号 JPS58141494(A) 申请公布日期 1983.08.22
申请号 JP19820022378 申请日期 1982.02.15
申请人 TOKYO SHIBAURA DENKI KK 发明人 INOUE AKIFUMI
分类号 G11C11/413;G06F12/06;G11C8/18 主分类号 G11C11/413
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