发明名称 RECEPTION MONITOR SYSTEM
摘要 PURPOSE:To simplify a reception monitor means of a signal, by switching and setting a polarity data corresponding to the state to be monitored out of the start and end states of communication for an indicating means indicating the polarity of the signal to be monitored. CONSTITUTION:When a start signal ST of a reception signal R is risen at a time t0, an output of an EOR circuit 2 goes to ''0''. Thus, a counter 7 is started with a timing pulse P. A discrimination section 6 compares a specified value G with a count value H of the counter 7, and when they are coincident, ''1'' is set to a bit (e) of a register 11. Thus, a processor 12 is interrupted, and the incoming of a signal ST is informed to the processor 2. After a data (d) succeeding to the ST is converted into a parallel data at a serial parallel conversion section 10, the data is stored in a memory 13 via a data bus D.
申请公布号 JPS58114549(A) 申请公布日期 1983.07.07
申请号 JP19810210498 申请日期 1981.12.26
申请人 FUJITSU KK 发明人 YAMAMOTO NOBORU;II TOSHIAKI
分类号 H04L25/40;H04L12/52;H04L29/08 主分类号 H04L25/40
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