发明名称 |
IMPROVEMENT IN AND RELATING TO THE MANUFACTURE OF WAFER SCALE INTEGRATED CIRCUITS |
摘要 |
The metallisation pattern for a wafer scale integrated circuit is achieved by the etching of a single metal layer (14) whereover photresist (16) has been exposed and developed using a step-and-repeat mask (18) for component bearing areas on the circuit (24) and a whole wafer reticle mask (26) for the areas of interconnection (30) between the component bearing areas (24). |
申请公布号 |
WO8302362(A1) |
申请公布日期 |
1983.07.07 |
申请号 |
WO1981GB00280 |
申请日期 |
1981.12.21 |
申请人 |
BURROUGHS CORPORATION;BURROUGHS MACHINES LIMITED |
发明人 |
BAILLIE, ALAN, GEORGE |
分类号 |
H01L21/3205;H01L21/027;H01L21/30;H01L21/768;(IPC1-7):01L21/90 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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