| 摘要 |
PURPOSE:To limit base currents to the increase of transistor collector currents by short-circuiting the gate and drain of an FET by a common electrode and connecting the electrode to the base electrode of the transistor. CONSTITUTION:A P region 22 surrounds an N region 10 original in an Si board 1, and has an electrode common with the region 10, and the electrode is connected to a base terminal 5 in condcutive form. When positive voltage is applied to a collector terminal 4, base currents flow through an emitter region 3 from a base region 21, and a P-N junction between the region 22 and the N region 10 is reverse-biased. When the voltage of the collector terminal 4 rises, a space charge layer extends from the region 22, and the effective flowing sectional area of the region 10 surrounded by the region 22 is adjusted. That is, since the FET is constituted in the section, a current limiting function limiting the increase of base currents, the increase of collector currents, is generated even when the voltage of the terminal 4 corresponding to a drain electrode to the base terminal 5 corresponding to a source electrode rises. |
