| 摘要 |
PURPOSE:To attain fail-safe output for a signal processor, by keeping either one level of a binary value of an output signal of a decision circuit even if a processing circuit is failed. CONSTITUTION:A logical circuit 18 of decision circuits 12a-12n goes to +V for a period t1 by a monitor signal from a monitor signal generating circuit 5, and to zero for other period t2. Further, if an output signal keeps +V due to a failure of the processing circuit 1, an output signal of each logical circuit 18 keeps zero, and an output signal of the processing circuit 1 keeps zero, then each logical circuit 17 is not oscillated, allowing the output signal of each logical circuit 18 to keep zero. Thus, the continuity of zero of the output signal of the logical circuit 18 over a long period as a period t3 of the monitor signal or over is used for a sensing signal of a sensor such as the presence of train at a controller of the next stage, and the output signal is in the state of fail-safe. |
