| 摘要 |
An MOS read only memory or ROM is formed by a process compatible with standard N-channel silicon gate manufacturing methods. The ROM is programmed after the top level of contacts and interconnections, usually metal, has been deposited and patterned. Address lines and gates are polysilicon, and output and ground lines are defined by elongated N+ regions. Each potential MOS transistor in the array is programmed to be a logic "1" or "0" by ion implanting through the polysilicon gates and thin gate oxide, using patterned protective oxide as a mask, or using photoresist as a mask prior to application of protective oxide.
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