发明名称 LINE CONTROL TERMINAL DEVICE
摘要 PURPOSE:To imporve the reliability of a line control terminal device in unmaned operation, by automatically restoring a microprocessor under hang-up through the next incoming or outgoing operation at a reset circuit. CONSTITUTION:In inputting a call signal, clocks are started for count, interruption is performed by an FF output at the 12nd clock, and when the microprocessor 2 is normal, a relay drive signal for DC closing is outputted to a line control section for closing and incoming operation, the counted value of the counter returns to the initial value and the count operation is stopped. When the processor 2 is hung up, since the processor 2 does no respond to the interruption, the counting operation is continued, a hang release reset signal is generated at the 15th clock, the processor 2 is reset and restored to the initial state. Then the counting is restored to zero and again started. When the counted value reaches 12, an interruption signal is again produced, the line is closed for the incoming operation.
申请公布号 JPS5899058(A) 申请公布日期 1983.06.13
申请号 JP19810197896 申请日期 1981.12.09
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA 发明人 KAKEHI TOSHIHARU;SEZAIMARU TAMOTSU;NAGASAWA YASUO;IWATA MINORU;MAEDA NOBUYOSHI
分类号 G06F11/30;G06F13/00;H04L29/12;H04M11/00;H04M11/06 主分类号 G06F11/30
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