| 摘要 |
PURPOSE:To remove the restriction of the sequence of the turning ON of a power supply by connecting the output terminal of an MIS circuit driven by means of the first power supply and the input terminal of an MIS circuit driven by means of the second power supply by the MISFET, a gate thereof is connected to the second power supply. CONSTITUTION:The N channel enhancement transistor Q21, the gate thereof is connected to the electrode Vpp, is formed between the output terminal 4 of the first circuit consisting of wiring 3 and the input terminal 5 of the second circuit composed of a transistor Q20. Accordingly, the order of the making of the power supplies Vpp, Vcc is freely selected. That is, when the power supply Vcc is turned ON prior to Vpp, the potential of the input terminal 5 is voltage low by value corresponing to the threshold voltage of the transistor Q21, and a P-N junction J' is not forward biased. The reverse of the sequence of turning ON is not at issue. Consequently, an element can be protected from breakdown even when either of the power supplies Vcc, Vpp is previously turned ON, and the sequence of turning ON is not under restriction. |
