发明名称 DISCRIMINATING CIRCUIT OF EVEN AND ODD FIELD OF PAL SYNCHRONIZING SIGNAL
摘要 PURPOSE:To discriminate even and odd number of fields without adjustment independently of separating characteristics of a vertical synchronizing signal separation circuit, by counting the number of equivalent pulse included in one horizontal period of a PAL synchronizing signal. CONSTITUTION:A vertical synchronizing signal separation circuit 10 integrates a synchronizing signal 5 and outputs a vertical synchronizing signal 6. A wave shaping circuit 11 detects the falling of the signal 5 and outputs a shaped synchronizing signal 15. The pulse width from a monostable multivibrator 12 inhibited with retrigering is set larger than 1/2 horizontal period and smaller than one horizontal period and the vibrator 12 is triggered with the signal 15. A gate circuit 13 detects the logical product of output signals of the multivibrator 12 by taking the signal 15 as a gate pulse and gives the result to a digital counter 19, which is cleared at each prescribed time at a reset pulse generating circuit 14 with a reset pulse 18 delaying the signal 6 for a prescribed time, and an even/odd discriminating signal output line 9 is kept to a logical level L at the number of fields and inverted into H at the odd number of fields, allowing to discriminate the even and odd numbers.
申请公布号 JPS5888990(A) 申请公布日期 1983.05.27
申请号 JP19810187469 申请日期 1981.11.20
申请人 MATSUSHITA DENKI SANGYO KK 发明人 FUKAI TOSHIHIKO
分类号 H04N9/44;H04N9/64;H04N9/66;H04N11/16;H04N17/00 主分类号 H04N9/44
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