发明名称 INSULATED GATE TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain an element having high drain withstand voltage by forming a field alleviating region at the intermediate between the source and drain regions when source and drain regions are formed in a semiconductor substrate as an IGFET, and forming an offset gate region while disposing the region under the gate oxidized film. CONSTITUTION:With an oxidized film of the prescribed shape as a mask P is diffused in a P type Si substrate 9, an N type source region 10, a drain region 11 and a field alleviating region 17 disposed between the regions 10 and 11 are formed. Then, the mask of the oxidized film which becomes unnecessary is removed, a gate oxidized film 16 is covered between the regions 10 and 11, and a gate electrode 13 which is made of P<+> type Si is mounted on the film 16 in the vicinity of the region 10 side. Thereafter, with the electrode 13 as a mask P ions are implanted to form offset gate regions 12 which are disposed at both sides of the region 17, is heat treated and is activated. Subsequently, a hole is opened at the regions 10, 11, and source and drain electrodes 14, 15 are respectively covered.
申请公布号 JPS5886772(A) 申请公布日期 1983.05.24
申请号 JP19810184799 申请日期 1981.11.18
申请人 NIPPON DENKI KK 发明人 SUZUKI TOSHIYUKI
分类号 H01L29/78 主分类号 H01L29/78
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