发明名称 Machine check coordination.
摘要 <p>This mechanism preserves in a trap register (18) the identity of the first error condition which is capable of causing a machine check even though other such conditions may have occurred before the data processing machine has stopped. After the first machine check condition has been examined, the remaining conditions stored in registers (8), if any, will be examined in accordance with a predetermined priority in a network (15) irrespective of the time sequence in which they occur.</p>
申请公布号 EP0078887(A2) 申请公布日期 1983.05.18
申请号 EP19820106654 申请日期 1982.07.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 STRANKO, THOMAS ANDREW;SWANN, ROBERT LEWIS
分类号 G06F11/32;G06F11/07;G06F11/34;(IPC1-7):06F11/00 主分类号 G06F11/32
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