发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To reduce power consumption and to speed up a titled circuit, by connecting a parallel circuit of a resistor and a capacitor or a diode, between a collector of a current driving transistor (TR) and a base of an off buffer TR. CONSTITUTION:In a TTL tri-state logical circuit, a parallel circuit consisting of a capacitor 21 and a resistor 20 or of a Schottky diode and a resistor is connected between a collector of a current drive TR7 and a base of an off buffer TR9. Thus, when the TR7 is switched off from on or inversly, since the current of interruption and conduction is increased, the switching speed of the TR9 can be quickened. Further, the circuit current when a tristate control input electrode 4 is 0 level is reduced, allowing to decrease the power consumption.
申请公布号 JPS5873237(A) 申请公布日期 1983.05.02
申请号 JP19810171682 申请日期 1981.10.27
申请人 NIPPON DENKI KK 发明人 KANDA MASAAKI
分类号 H03K19/088;H03K19/018;H03K19/082 主分类号 H03K19/088
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