| 摘要 |
<p>A process for making electrical contact between a poly (polycrystalline silicon) interconnect layer (21) and a doped region such as a source/drain region in a silicon substrate (2) includes the steps of ion implanting a region (19) of the substrate (2) adjacent to the location of the doped region and covered by a silicon dioxide layer (4) to form a channel adapted for operation as a depletion mode channel (23). A segment of the silicon dioxide layer (4) is removed to expose a segment (19) of the substrate. A poly interconnect layer (21) is then formed and etched, the silicon dioxide layer (4) protecting the substrate (2) from surface damage during etching. The poly interconnect layer and adjacent region of the substrate are then doped to form conductors and the doped source/drain regions, respectively.</p> |
