| 摘要 |
PURPOSE:To reproduce clock information with high stability, by reproducing a recording medium for modulation of frequency of the randomized digital signals which underwent a specified addition and reproducing the signals obtained before the randomization after the detection of the synchronizing signal bit and a specified addition. CONSTITUTION:An M series code and a disk 24 which performed an addition using 2 as a divisor are reproduced through a pickup circuit 25, and the signal of a main track is supplied to a level converting circuit 27 via an FM demodulating circuit 26. The data-scrambled data series are taken out through the circuit 27. Then a clock component is extracted through a tank circuit 29 and applied to a latch 31 after the compensation in which a jitter is absorbed by an PLL30. The output of the latch 31 is supplied to a synchronizing signal bit detecting/ protecting circuit 32, and the control signal extracted out of the circuit 32 is supplied to an M series code generating circuit 33. The circuit 33 has the same constitution of circuit as the recording mode. The outputs of the latch 31 and the circuit 33 undergoes an addition using 2 as a divisor through an exclusive OR circuit 34 and is descrambled. |
