| 摘要 |
PURPOSE:To prevent gate insulating film from breakdown by a method wherein a lower layer wiring to be connected to the gate remains connected to an Si substrate for the escape of charges parasitic on the lower layer wiring until the completion of the upper layer wiring, in a multilayer wiring building process. CONSTITUTION:A field oxide film 12, oxide thin filsm 15 and 15', polycrystalline Si gate electrode 16 are formed on a P<-> type Si substrate 11, and are activated by the forming of N layers 18a, 18b, and 19 by P ion implantation. The entire surface is then covered with a PSG layer 17 wherein windows 20 and 21 are provided, which is followed by the formation of an Al-made source/drain wiring (not illustrated), gate wiring 22, a branch wiring 22' between the gate electrode 16 and the N layer 19. Next, a coating of a PSG layer 23 is applied, wherein windows 24 and 25 are provided to be deposited with an Al layer 27'. Then a resist mask 26 is provided for the formation of an upper wiring 27, which is followed by the sectioning by etching of the branch wiring 22'. In this construction, the lower layer gate wiring 22 remains connected to the substrate 11 via a reverse direction junction between the layer 19 and the substrate 11 until the comletion of the upper wiring 27 to be connected thereto, which allows the high potential charges accumulated in the process of work to escape to the substrate 11 via said junction, thereby preventing the gate oxide film 15 from breakdown. |
