发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To reduce readout and write time of information to a processor at diagnosis, by detecting the number of bits of FF groups with one access and storing the number to a storage circuit. CONSTITUTION:A flip-flop group FFM selected in a processor is shifted with a clock signal CM and the content of FFM0-FFMK-1 is appeared in a scanout signal SoutM as a time series. The signal SoutM is selected at a switching circuit 5 and applied to a storage circuit 5 of a diagnostic control section 4. When the signal Sout is written in the circuit 5, the content of an address register 8 is added by 1 and the content of the FFM is shifted right by one bit. On the other hand, the content of a storage circuit 6 corresponding to each set of the FF group and the content of the register 8 are compared at a coincidence circuit 7 and this operation is repeated until the result of comparison is coincident with each other. The content of the address of the circuit 5 designated at the register 8 is applied to the processor with a scan-in signal Sin and the content of the FFM is shifted.
申请公布号 JPS5829055(A) 申请公布日期 1983.02.21
申请号 JP19810128099 申请日期 1981.08.15
申请人 NIPPON DENKI KK 发明人 NISHINA RIYOUZOU
分类号 G06F11/22;G01R31/3185 主分类号 G06F11/22
代理机构 代理人
主权项
地址