| 摘要 |
PURPOSE:To prevent in advance occurrences of abnormalities in the unit, by performing parity checks of data on the whole addresses before the program execution processing is started or when the program execution processing is not performed. CONSTITUTION:When a power source circuit is turned on, a clear sinal generating circuit 4 is started for operation and a program counter 1 and FFs 5 and 6 are set to the reset condition. Then, a partity check is performed by a parity check circuit 3, and, when the result of the parity check is normal, a ''0'' is outputted and the output of an AND circuit 7 becomes ''0''. When an error is detected as the result of the parity check, the output of the circuit 7 becomes ''1'', the FF6 is set, and the output of an NAND gate 8 becomes ''0''. Moreover, the program counter 1 is stopped and an address where the erroneous data are stored is displayed. |
