发明名称 FORMING METHOD FOR MONITORING CIRCUIT OF SEMICONDUCTOR ELEMENT FORMED ON SEMICONDUCTOR SUBSTRATE
摘要 PURPOSE:To improve the yield of a method of forming a monitoring circuit by alloying electrodes of a monitoring element on an Si substrate and an initial wiring layer to monitor the propriety, thereby preventing a shortcircuit between layers produced due to a projection formed on the wiring layer. CONSTITUTION:A chip 12 of chips 11 on an Si substrate 10 is used as a monitor, and an initial wiring layer is adhered in the predetermined pattern, for example, to the electrodes of an MOSFET formed on the chip 12. Subsequently, in order to connect the electrodes to the wiring layer, a CO2 laser is emitted, is absorbed to an SiO2 and a PSG, the periphery of the electrodes is heated, a heat is transmitted to the Al and Si of the electrodes to alloy them. The Al and Si are alloyed optimally at 200-450 deg.C, whereupon no damage is produced at the insulating film. Thereafter, a probe is contacted with the electrodes of the monitoring element, the PSG is covered as the conventional manner when it is good, the second wiring layer of the prescribed pattern is formed, and the electrodes and the wiring layers for the element of a product except the monitoring element are alloyed by heating at the time of growing the PSG. According to this structure, the element of the chip of the product is not heated at the monitoring time, and can be monitored without shortcircuit due to the projections on the wiring layers.
申请公布号 JPS57193041(A) 申请公布日期 1982.11.27
申请号 JP19810077650 申请日期 1981.05.22
申请人 FUJITSU KK 发明人 SHINGUU MASATAKA;IKUBO HIROYUKI
分类号 H01L21/66;(IPC1-7):01L21/66 主分类号 H01L21/66
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