| 摘要 |
<p>An integrated circuit for recovering a position and clock period from an input biphase encoded digital signal, such as an SPDIF signal, has a longest interval detector arranged to count the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal. A store is arranged to store the longest interval between phase changes and an output provides a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal. The longest interval detector comprises a pair of counters for even and odd phase transitions and counts in multiple intervals such that a clock period of 2UI can be recovered directly from the longest pulse of 6UI present in the preamble X of an SPDIF signal.</p> |
