| 摘要 |
PURPOSE:To achieve the correction of approximate quotient at high speed and with a simple circuit, by obtaining a dividend in effective number of digits m, approximate quotient of one digit of the least significant digit of a divider, and multiplication by the divider to 2m digits, and checking and comparing the state of the lower m digits. CONSTITUTION:A divider D and a dividend N in effective number of digits m, are respectively stored in buffers 12 and 13, an approximate quotient QH in the upper m digits as the result of addition of 1 to the least significant digit of the approximate quotient of the N/D having larger number of digits than the m digits is stored in a buffer 11 and the result is given to an operation circuit 1 on a pipeline in mutual synchronism. In the circuit 1, the result of multiplication in 2m digits as QHXD is obtained at multiple generating circuits 31-33, carry save adaptors 21-23 and an adder 24 to detect at 35-37 whether the least significant digit of multiplication is 0, and if the least significant m-digit is all 0, 1 is stored in a register 107. One bit at the m-th upper order of the QHXD and the least significant bit of the dividend N are compared at 38, and when they are coincident, 1 is outputted to correction data producing circuit 39. The circuit 39 produces an approximate quotient correction data from the output of the register 107 and the circuit 38, the data is added at 25 with the QH and the correct quotient is given to a buffer 14. |
