| 摘要 |
PURPOSE:To reduce the characteristic distribution within a wafer as well as to increase the yield rate of production for the subject inverter by a method wherein the layer, on which a driving enhansement type FET will be formed, is formed thinner than the thickness of the layer whereon loading depression type FET will be formed. CONSTITUTION:The thickness of the epitaxial layer, whereon the enhansement type FET6 for driving will be formed, is formed thinner than that of the epitaxial layer whereon the depression type FET for loading will be formed, and an enhancement and depression (E-D) type inverter is constituted. In the E-D type inverter constituted as above, after a wafer has been processed and also the first ohmic electrode 1 and the second ohmic electrode 2 for the first stage inverter have been formed, the second gate electrode 5 for the first stage inverter and the first gate electrode 10 for the second inverter can be formed simultaneously in the same depth. |
