| 摘要 |
<p>PURPOSE:To expand the spaces of addresses by accessing the operation code and operand of a data transfer instruction from a CPU to a memory from an instruction bank and also accessing the data to be executed from a data bank. CONSTITUTION:Random access memories (RAMs) 2 and 3 and a CPU1 are connected to each other through a data bus 4 and an address bus 5, the RAM2 and the RAM3 are used as an instruction bank and a data bank, respectively. The RAMs 2 and 3 are assigned to the spaces of the CPU1 and an instruction detecting circuit 11 supplies an instruction code fetching signal SS from the RAM2 to the RAM3. Thus, the operation code and the operand from the CPU1 are accessed from the RAM2, and data to be exectured by a memory transfer instruction is accessed from the RAM3. Consequently, the RAMs 2 and 3 use the address spaces in common, expanding the address spaces.</p> |
