发明名称 PREVENTING CIRCUIT FOR PHASE ERROR DETECTION OF PHASE SYNCHRONIZING LOOP CIRCUIT
摘要 PURPOSE:To prevent the malfunction due to the asynchronism between an input data and the clock, by latching the input data synchronously with the clock given from a voltage control oscillator and obtaining a one-shot pulse from the latch output to supply it to a phase comparator. CONSTITUTION:An input data signal 20 is applied to a D type FF5 and latched synchronously with the clock signal given from a voltage control oscillator 4. The output 28 of the FF5 is supplied to a one-shot circuit consisting of D type FF11 and 12, an EX-OR13 plus an AND14. Thus an output pulse 25 equivalent to a clock is obtained in accordance with the rise of an input data. A wind controller 2 counts the clocks to produce a dummy data signal 26. The signal 26 and the pulse 25 are applied to a phase comparator 3. The comparator 3 applies the control output voltage 27 corresponding to the phase error between the signal 26 and the pulse 25 to the oscillator 4.
申请公布号 JPS57162525(A) 申请公布日期 1982.10.06
申请号 JP19810046182 申请日期 1981.03.31
申请人 TOKYO SHIBAURA DENKI KK 发明人 MATSUMOTO SEIJIROU
分类号 H03L7/085;H03L7/08 主分类号 H03L7/085
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