| 摘要 |
PURPOSE:To reduce the deviation of frequency in the free-running mode, by consecutively supplying the control voltage to a voltage control oscillator to compensate the deviation of frequency obtained immediately before starting the free-running and after the start of the free-running. CONSTITUTION:The clock supplied to an input terminal 21 from a main station and the output of a voltage control oscillator 3 are supplied to a phase comparator 1 to obtain an output having a pulse duration corresponding to the difference of phase between the clock and the output. This output is supplied to a low pass filter 2 that converts the value of the pulse duration into the value of the voltage as well as to a pulse duration enlarging circuit 11 that enlarges the pulse duration to the 200-fold value. The output of the circuit 11 is fed to a counter 12 to count the pulse duration, and the count value of the counter 12 obtained immediately before the interruption of the clock sent from the main station is maintained at a storage circuit 13. This count value is converted into the analog voltage value through a D/A converter 14. A selecting circuit 16 is controlled by the output of a free-running detecting circuit 15 and connects the converter 14 to the oscillator 3 when the clock given from the main station is interrupted and the free-running state is detected. |
