| 摘要 |
PURPOSE:To obtain a high speed pattern generator which eliminates the generation of dummy cycles with an auxiliary pattern memory in an intereaving system using a low speed memory. CONSTITUTION:Receiving an address signal generated from an address generation circuit 11 a control circuit 12 generates a lead address to a pattern memories 14 and 15 and a lead address to an address conversion memory 13. In the address conversion memory 13, a lead address of an auxiliary pattern memory 16 is stored according to the address from the control circuit. Based on a pattern data for the discontinuation of a pattern address stored in the auxiliary pattern memory 16, the outputs of the pattern memories 14 and 15, the output of the auxiliary pattern memory 16 are selected in a timesharing manner with the action of a section circuit 17. Thus, the addition of a small-capacity auxiliary pattern memory allows random accessing of a pattern output thereby afforing a high speed generator without generation of dummy cycles. |
