发明名称 WIRING SUBSTRATE LOADED WITH SEMICONDUCTOR PARTS
摘要 PURPOSE:To shorten intervals among a plurality of semiconductor elements, and to bring mounting to high density by arranging pads on the wiring substrate loaded with the semiconductor elements belonging to adjacent semiconductor elements under a complicated condition while avoiding contact among metallic wires in the wiring substrate. CONSTITUTION:The semiconductor elements 20, 20' are fixed in element loading regions 12, 12' on the wiring substrate while being mutually adjoined, a large number of the pads 13, 13' are formed while being positioned around these elements, and pads 21 shaped to the elements 20, 20' and the pads 13, 13' on the substrate are each connected by using the metallic wires 30, 30'. In this constitution, the opposing pads 13, 13' for the adjacent elements 20, 20' are not formed rectilinearly, and disposed in a complicated shape while avoiding contact with the metallic wires 30, 30'. Accordingly, the loading intervals of the elements can be shortened, and the density of mounting is increased.
申请公布号 JPS57149760(A) 申请公布日期 1982.09.16
申请号 JP19810033908 申请日期 1981.03.11
申请人 HITACHI SEISAKUSHO KK 发明人 TAGAMI BUNICHI;KOBAYASHI FUMIYUKI
分类号 H01L25/18;H01L21/60;H01L23/52;H01L25/04 主分类号 H01L25/18
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