| 摘要 |
PURPOSE:To generate an input pattern and an output expected value pattern without providing a dummy part, by storing input/output switching control data in the same memory together with the input pattern for test and the output expected value pattern in a prescribed order. CONSTITUTION:A memory 1 is accessed at a timing 7 of T1, and data is taken into memory contents analyzing circuit 2, and data are set to registers in accordance with contents of the memory. In case of input/output control data and discrimination strobe control data, a pattern memory is accessed further at a timing 8 of T2 and a timing 9 of T3 in the same test cycle, and input/output control data, discrimination strobe control data, and pattern data are set to an input/output control register 3, a discrimination strobe control register 4, and a pattern register 5 respectively. Thus, a pattern generator is obtained which processes data required for input/output switching, the input pattern for test, and the output expected value pattern in parallel in the same cycle without a dummy cycle. |
