发明名称 INTERRUPTION CONTROLLING SYSTEM
摘要 PURPOSE:To avoid the stagnancy of data processings, by releasing the interruption holding state of an input/output device when the interruption is suspended and storing the completion of the preceding access in a memory. CONSTITUTION:A flag part 1 is provided in a controller CU-1', and a flag indicating the generation of a device end signal DEVICEEND is set there. A flag part 2 controls the flag similarly to the flag part 1 and is provided in a controller CU-2'. A latch 4 is set when the access request to an input/output device IO-0' is rejected in the controller CU-1' because of the busy state, and the latch 4 is reset when an interruption is suspended on a channel CH-1. When the latch 4 is set to generate an output in this manner and this output and the access end signal of the controller CU-2' are inputted to an AND gate 5, the AND gate 5 generates an output.
申请公布号 JPS57127227(A) 申请公布日期 1982.08.07
申请号 JP19800187053 申请日期 1980.12.27
申请人 FUJITSU KK 发明人 KURIHARA YASUO
分类号 G06F13/12;G06F9/46;G06F9/48;G06F13/24 主分类号 G06F13/12
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