发明名称 DEBUGGING CONTROL SYSTEM
摘要 PURPOSE:To test the functions of a control part easily by selectively inputting time pulses to a controller by a switching means of making operation effective while a register which sets by an access request and resets by a response is set. CONSTITUTION:A data processing system consists of a control part 15 controlled by tine pulses, a microprocessor 14 connected to the control part 15 by a bus 20, and an input-output equipment 21. This control part 15 is provided with a register group 16 which is set by the access request signal Q of the processor 14 and reset by a ready signal R from the control part 15. While the register group 16 is set, the operation of the control part 15 is made effective by a switching means consisting of switches S1 and S2, flip-flops F1-F3, an AND circuit 13, etc., and the time pulses to be supplied to the processor 14 are selected by the switching means and inputted to the control part 15 to perform debugging, thereby checking the functions of the control part 15.
申请公布号 JPS57109059(A) 申请公布日期 1982.07.07
申请号 JP19800186902 申请日期 1980.12.26
申请人 FUJITSU KK 发明人 SHIBATA TOMOHITO;HASHIMOTO SHIGERU;KOBAYASHI MASAAKI
分类号 G06F11/22;G06F11/28;G06F11/36 主分类号 G06F11/22
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