| 摘要 |
PURPOSE:To designate optionally the control of preset and up/down count directions by the logical control of each flip-flop output, by using S-RD type flip-flops as counting elements of the up/down counter. CONSTITUTION:An up/down counter consists of S-RD type FFs 26-29 each of which has a data input terminal, a clock input terminal CK, a set terminal S, a reset terminal R, etc.; and if data A-D for set are inputted when a signal L for set is applied, data are preset to FFs 26-29. Logical gates 14-25 consists of gate circuits for AND of output signals of preceding stages, AND of inversion output signals, OR of AND gates, etc., and respective gates are controlled by an up/down signal UD to count up or down a clock signal CLK or count up or down from the preset value, and thus, the signal UD is changed to change the count direction optionally. |
