发明名称 INSTRUCTION CONTROL SYSTEM
摘要 PURPOSE:To increase the processing speed, by realizing the independent control for an instruction process pipeline through each of plural instruction control pipelines and accordingly eliminating the idle instruction process pipeline. CONSTITUTION:When the instruction information indicates an addition, a selector 7 selects the side of stages 3-1-3-3. The addition instruction stored in the stage 3-1 is shifted to stages 3-2 and 3-3 successively, and the addition instruction information is supplied to an instruction process pipeline 1. In case the instruction information indicates a multiplication, the selector 7 selects the side of stages 4-1, 4-2 and 4-3. The multiplication information stored in the stage 4-1 is shifted to stages 4-2 and 4-3 successively. Then the multiplication information is shifted to the pipeline 1.
申请公布号 JPS5794879(A) 申请公布日期 1982.06.12
申请号 JP19800170544 申请日期 1980.12.03
申请人 FUJITSU KK 发明人 SAKAMOTO KAZUSHI
分类号 G06F9/38;G06F17/16 主分类号 G06F9/38
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