发明名称 ERROR CORRECTING CODE SYSTEM
摘要 PURPOSE:To generate a code having extremely large error correcting capacity, by using double interleave and installing 4 parities. CONSTITUTION:An encoder 1 of an interleave means 14 installs parities P', Q' so as to become a Hamming distance 3, and to this encoder 1, information words Wn, Wn' and parities Pn, Qn generated by an encoder 6 of an interleave means 15 are inputted. Wn, Wn' and Pn, Qn pass through delay elements 2-5, and after that, are inputted to the encoder 6, and parities P, Q are generated. Also, the outputs of the elements 2, 3 and the encoders 1, 6 are inputted to delay elements 7-12 of an interleave means 16, and the outputs of these elements 7- 12 are inputted to a CRCC (cyclic redundancy check code) generator 13. In such an encoding method, for instance, when a correction by P and Q sequence is executed at first, and then the correction by P' and Q' is executed, a code having octuple error correcting capacity is generated.
申请公布号 JPS5785149(A) 申请公布日期 1982.05.27
申请号 JP19800163102 申请日期 1980.11.18
申请人 MATSUSHITA DENKI SANGYO KK 发明人 HIROSE TSUNEO
分类号 G06F11/10;H03M13/27;H03M13/29 主分类号 G06F11/10
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