发明名称 FIXED DELAY INSERTION AND REMOVAL MEMORY CIRCUIT
摘要 <p>PURPOSE:To prevent malfunction during frame synchronizing hunting under a simple control, by inhibiting the malfunction of fixed delay insertion and removal produced secondarily after fixed delay insertion and removal through the information of fixed delay insertion and removal and the information in frame synchronism hunting. CONSTITUTION:A fixed delay insertion and removal memory circuit X connected to a frame synchronism circuit 4 consists of a fixed delay element 1, selector 2, flip- flop 3, memory circuit 5, write address counter 6, read address counter 7 and phase comparison circuit 8. Further, a protection circuit Y consists of a leading detection circuit 9, and set/reset flip-flop 10. The protection circuit Y controls the operation of the phase comparison circuit 8 based on the information of the fixed delay insertion and removal and the information in the frame synchronism hunting and the insertion/removal of fixed delay is inhibited until the frame synchronism is established.</p>
申请公布号 JPS5773546(A) 申请公布日期 1982.05.08
申请号 JP19800149000 申请日期 1980.10.24
申请人 FUJITSU KK 发明人 FUJII YUUZOU;IKEDA TOSHIO
分类号 H04J3/06;G06F5/06;G06F13/00;H04L7/00;H04L7/08 主分类号 H04J3/06
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