发明名称 |
MULTIFREQUENCY SIGNAL RECEIVER |
摘要 |
PURPOSE:To make discrete Fourier conversion possible without a multistage shift rgister, by using a primary cyclic digital filter, where the filter coefficient is a positive number smaller than 1, in the multifrequency signal converter using discrete Fourier conversion. CONSTITUTION:When an input signal f(nt) is inputted to a terminal 1, cosnomegaT and sinnomegaT supplied from a generating circuit 7 are multiplied by multipliers 31 and 32 and are inputted to adders 41 and 42. Adders 41 and 42 constitute a primary cyclic digital filter together with multipliers 35 and 36 for multiplication of a filter coefficient alpha (alpha is a positive number smaller than 1) and one-period delay registers 51 and 52, and a real part Fc' and an imaginary part Fs' are outputted from adders 41 and 42. The Fc' and the Fs' are squared and are added by an adder 45. |
申请公布号 |
JPS5765948(A) |
申请公布日期 |
1982.04.21 |
申请号 |
JP19800142601 |
申请日期 |
1980.10.13 |
申请人 |
FUJITSU KK;NIPPON DENSHIN DENWA KOSHA;OKI DENKI KOGYO KK;NIPPON DENKI KK;HITACHI SEISAKUSHO KK |
发明人 |
FUJII KENSAKU;IMAGAWA HITOSHI;KAWAGUCHI MASAHARU;FUKUI AKIRA;MURAMATSU RIYUUJIROU |
分类号 |
H04Q1/457;H03H17/02;H04L27/26 |
主分类号 |
H04Q1/457 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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