发明名称 COUNTER
摘要 PURPOSE:To speed up the counter by the constitution that inversion circuits shifting signals through one phase clock pulse are in cascade connection. CONSTITUTION:A complementary MOSFET consisting of two series-connected pch type MOSFETs and two series-connected nch type MOSFETs, is used. A clock pluse is applied to one gate electrode of the pch and nch MOSFETs and the output of the preceding stage is applied to another gate. The inverter like this is in cascade connection by n stages to constitute the frequency circuit of 1/n.
申请公布号 JPS5750137(A) 申请公布日期 1982.03.24
申请号 JP19800125470 申请日期 1980.09.10
申请人 NIPPON DENKI KK 发明人 IIDA NORIHIKO
分类号 H03K23/64;H03K23/40;H03K23/54 主分类号 H03K23/64
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