| 摘要 |
PURPOSE:To effectively reduce the CR time constnat of a digit line, by connecting various circuits to the center part of a pair of digit lines. CONSTITUTION:Precharging circuits 11 and 12, a sense amplifier 21, Y and X decoder switches 31 and 32, loading circuits 41 and 42, etc. are arranged at the center part between a real digit line 1 and an auxiliary digit line 2. With such arrangement of circuits, both the capacity value and the resistance value are reduced down to 1/2 in comparison with a constitution in which various circuits are arranged by one channel respectively at the end of the sense amplifier circuit side of both digit lines. Accordingly, the CR time constant of the digit line is effectively reduced. As a result, a high-speed operation is possible for a memory device. |
