| 摘要 |
PURPOSE:To avoid the saturation of a demodulation transistor (TR) even if the amplitude of signal is greater, by providing a means clamping the collector potential of the upper stage TR at about the base potential producing an output at the collector. CONSTITUTION:In a demodulation circuit 1 for B-Y, a chrominance signal is in- 1/2 phase to the collector of a TR104 and in opposite phase to the collector of a TR105. In TRs 100, 101, 102, 103 of the upper stage differential pairs, the phase synchronizing detection between the chrominance signal and chrominance subcarrier wave is made, and an output with negative polarity is produced at a point (b) in common connection of the collectors of the TRs 100, 102 and an output with positive polarity is produced at a point (c). When the amplitude of signal is increased and the potential at the point (b) comes near the base potential of the TRs 100, 102, a TR115 turns on and the potential of the point (b) is clamped near the base potential. Thus, between the base and collector of the TRs 100, 102, are not forward biased and demodulated outputs 4, 5 are accurate. |
