发明名称 DRIVING CIRCUIT OF SPEAKER FOR ELECTRONIC CLOCK
摘要 PURPOSE:To form various type tones and at the same time, make a CPU intermittently work so as to reduce power consumprion by making a temporary storing circuit in transistor PLA type for an electronic clock provided with a microprogram control circuit. CONSTITUTION:Data 435-438 for driving a speaker enter into a latch decoder 400 from an accumulator. One of outputs of the latch decoder 400 is selected by this data. At this time, a clock signal generation circuit temporarily stops a part of or all the clocks. To the output of the latch decorder 400, 32Hz signal 456, 16Hz signal 457- are applied, and transistors 401-407 are connected to an AND formation part in order to form a mecessary speaker drive gate signal. To the speaker drive gate signal produced in this way, a signal for modulation 468 is added to from a modulated signal 469 which drives the speaker 121.
申请公布号 JPS5717889(A) 申请公布日期 1982.01.29
申请号 JP19800093016 申请日期 1980.07.08
申请人 SUWA SEIKOSHA KK;SHIMAUCHI SEIKI KK 发明人 YOSHINAMI TOSHIMASA
分类号 G04G13/00;G04G99/00;G10H1/00;G10K15/04 主分类号 G04G13/00
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